Method to form MOSFET with an elevated source/drain

Details Method to form MOSFET with an elevated source/drain Method to form MOSFET with an elevated source/drain

1999-05-07

2000-12-05

Fahmy, Wael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438306, 438585, H01L 21336

Patent

active

061566136

ABSTRACT:
A gate insulator layer is formed over the semiconductor substrate and a first silicon layer is then formed over the gate insulator layer. An anti-reflection layer is formed over the first silicon layer. A gate region is defined by removing a portion of the gate insulator layer, of the first silicon layer, and of the anti-reflection layer. A doping step using low energy implantation or plasma immersion is carried out to dope the substrate to form an extended sourcedrain junction in the substrate under a region uncovered by the gate region. An undoped spacer structure is formed on sidewalls of the gate region and the anti-reflection layer is then removed. A second silicon layer is formed on the semiconductor substrate and the first silicon layer. Another doping step is performed to dope the substrate to form a source/drain junction in the substrate under a region uncovered by the gate region and the undoped spacer structure. A thermal process is performed to the semiconductor substrate, in order to diffuse and activate dopants in the extended source/drain junction and the source/drain junction.

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S. Wolf et al., Silicon Processing for the VLSI Era V.1 , Lattice Press: CA, pp. 539-557, Dec. 1986.
Wu et al. IEE Proc.-Circuits Devices Syst. vol. 141 No. 1 Feb. 1994.

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