Method of fabricating insulated-gate field-effect transistors ha

Details Method of fabricating insulated-gate field-effect transistors ha Method of fabricating insulated-gate field-effect transistors ha

1997-01-30

2000-09-12

Trinh, Michael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438279, 438287, 438981, H01L 218234

Patent

active

061177369

ABSTRACT:
A static random-access memory integrated circuit formed on a single substrate includes a storage IGFET formed on the substrate and having a first area and a first capacitance. A gating FET formed on the substrate has an area substantially equal to the first area with a capacitance substantially less than the first capacitance. In one aspect, the storage FET has a substantially thicker gate oxide than the gating FET. In another aspect, the gate oxide of one of the FETs is formed from a different material than that of the other FET. A method for fabricating such IGFETs on a single substrate is also provided in which source and drain regions are formed adjacent the surface of the substrate. A first layer of gate oxide is formed on the surface of the substrate over the channels of the first and the second FETs. The first layer of gate oxide is then covered by a nitride layer which is thereafter etched away over the channel of one of the FETs. A second layer of gate oxide is deposited on the first layer of gate oxide exposed as a result of the etching. Thereafter, the nitride layer and that portion of the first layer of gate oxide not over the channel of either FET are both removed.

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patent: 5480828 (1996-01-01), Hsu et al.
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