Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Patent
1998-06-16
2000-02-01
Heckler, Thomas M.
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
G06F 112
Patent
active
060215046
ABSTRACT:
An internal clock synchronizing circuit capable of solving a problem involved in a conventional high speed microcomputer system in that it takes a long time to establish clock synchronization between system component circuits of the microcomputer system. The internal clock synchronizing circuit includes a clock generator for generating an internal clock signal by dividing an original clock signal; a clock comparator for comparing the internal clock signal with a reference clock signal; a compared result holding circuit for holding, in synchronism with the original clock signal, a compared result signal output from the clock comparator; and a clock switching circuit for switching supply of the original clock signal to the clock generator in response to the compared result signal held in the compared result holding circuit.
REFERENCES:
patent: 4813305 (1989-03-01), Redig et al.
patent: 5565816 (1996-10-01), Coteus
patent: 5717353 (1998-02-01), Fujimoto
patent: 5790608 (1998-08-01), Benayoun et al.
patent: 5859549 (1999-01-01), Shuholm
patent: 5889829 (1999-03-01), Chiao et al.
Heckler Thomas M.
Mitsubishi Denki & Kabushiki Kaisha
LandOfFree
High-speed internal clock synchronizing method and circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High-speed internal clock synchronizing method and circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-speed internal clock synchronizing method and circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-946420