Synchronous static random access memory having precharge system

Details Synchronous static random access memory having precharge system Synchronous static random access memory having precharge system

1988-08-09

1989-08-08

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Precharge

36518911, G11C 1140

Patent

active

048561061

ABSTRACT:
A plurality sets of bit line pairs are connected to one set of common data line pair respectively through bit line selecting transistors. The common data line pair is coupled to the supply potential through precharging transistors. In the precharging period, a set of bit line pair is selected by a Y decoder to be connected to the common data line pair. On this occasion, the precharging transistor turns on in response to a precharge signal and the selected bit line pair is precharged through the common data line pair. The bit line pair which is not selected is not precharged.

REFERENCES:
patent: 4788457 (1988-11-01), Mashiko et al.

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