Method of making self-aligned silicide CMOS transistors

Details Method of making self-aligned silicide CMOS transistors Method of making self-aligned silicide CMOS transistors

1998-03-30

1999-09-21

Brown, Peter Toby

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438307, 438558, 438649, 438651, 438664, 438683, H01L 218238

Patent

active

059565845

ABSTRACT:
The present invention includes forming gate structures having a nitride cap on the substrate. An ion implantation is used to dope ions into the substrate to form the lightly doped drain (LDD) structures. An oxide layer is formed on the gate structures. Subsequently, the oxide layer is etched back to form oxide spacers on the side walls of the gate structures. Next, an ion implantation with a high dose is carried out to dope nitrogen ions into the oxide spacers, the cap silicon nitride and the silicon substrate. The cap silicon nitride layer is then removed. Then, a refractory or noble metal layer is sputtered on the substrate, nitride doped oxide spacers and the gates. A first step thermal process is performed to form SALICIDE and polycide. Next, an ion implantation is utilized to dope ions into the SALICIDE and polycide films. A second step thermal process is employed to form shallow source and drain junction.

REFERENCES:
patent: 4703551 (1987-11-01), Szluk et al.
patent: 5021358 (1991-06-01), Flanner et al.
patent: 5190888 (1993-03-01), Schwalke et al.
patent: 5358879 (1994-10-01), Brady et al.
patent: 5427964 (1995-06-01), Kaneshiro et al.
patent: 5432105 (1995-07-01), Chien
patent: 5482878 (1996-01-01), Burger et al.
patent: 5506161 (1996-04-01), Orlowski et al.
patent: 5656519 (1997-08-01), Mogami
patent: 5668024 (1997-09-01), Tsai et al.
patent: 5759886 (1998-06-01), Chung
patent: 5773348 (1998-06-01), Wu

Affiliated with

Also associated with

Rating

Method of making self-aligned silicide CMOS transistors does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making self-aligned silicide CMOS transistors, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making self-aligned silicide CMOS transistors will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-90827