Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1996-08-16
1998-11-17
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438669, 438657, 438688, H01L 21441
Patent
active
058376046
ABSTRACT:
A method for forming an interconnect of a semiconductor device including the steps of: sequentially forming an interlevel insulating layer and auxiliary layer on a substrate supporting a lower conductive line; doping impurity ions into the auxiliary layer, and selectively removing the auxiliary layer and interlevel insulating layer to thereby form a contact hole sufficient to the lower conductive line; and depositing and growing a conductive material in the contact hole and on the auxiliary layer to thereby form an upper conductive line.
REFERENCES:
patent: 5045494 (1991-09-01), Choi et al.
patent: 5084403 (1992-01-01), Matsuoka
patent: 5151305 (1992-09-01), Matsumoto et al.
patent: 5180687 (1993-01-01), Mikoshiba
patent: 5262361 (1993-11-01), Cho et al.
patent: 5374591 (1994-12-01), Hasegawa et al.
patent: 5466638 (1995-11-01), Eguchi
Everhart Caridad
LG Semicon Co. Ltd.
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