Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent
1997-04-11
1999-07-27
Canney, Vincent P.
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
G06F 1100
Patent
active
059283742
ABSTRACT:
In a large system such as a parallel computer system, a scan device forms a scan path by hierarchically connecting input and output signal lines of integrated circuits, thereby enabling creating of a short scan path which contain only the necessary integrated circuits. This allows a scan test such as JTAG-SCAN to be effectively made.
REFERENCES:
patent: 5581541 (1996-12-01), Whetsel
patent: 5751736 (1998-05-01), Deroux-Dauphin et al.
Asai Toshihiro
Shimizu Toshiyuki
Canney Vincent P.
Fujitsu Limited
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