Method to form ultra-short channel MOSFET with a gate-side airga

Details Method to form ultra-short channel MOSFET with a gate-side airga Method to form ultra-short channel MOSFET with a gate-side airga

1998-03-02

1999-12-14

Chaudhuri, Olik

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438305, 438307, 438595, 257340, 257387, 257410, H01L 2122, H01L 21225, H01L 2138, H01L 21385

Patent

active

060016957

ABSTRACT:
First, a field oxide region, a pad oxide layer and a first nitride layer are formed on a silicon substrate, respectively. Then, a portion of the first nitride layer is removed. A first oxide layer and a nitride spacer are formed on the substrate, respectively. Portions of the first oxide layer and the pad oxide layer are removed to form a first region of the first oxide layer and a second region of the first oxide layer. Then, an ion implantation is performed to form a punch-through stopping region. Next, a second oxide layer and an amorphous-Si layer are formed on the substrate, respectively.
Portions of the a-Si layer are etched back. Next, the first nitride layer and the nitride spacer are removed. An ion implantation is performed to form a source, a drain and a doped region at the bottom of the second region of the first oxide layer. Then, a Rapid Thermal Process is used to drive dopant diffusion to form an extended source/drain junction. A third oxide layer is deposited on the substrate, wherein an air-gap is formed between the first region of the first oxide layer and a-Si layer. Finally, portions of the third oxide layer and the pad oxide layer are etched back to form an oxide spacer with the air-gap.

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