Method of fabricating a capacitor over a bit line of a DRAM

Details Method of fabricating a capacitor over a bit line of a DRAM Method of fabricating a capacitor over a bit line of a DRAM

1998-06-02

1999-12-14

Bowers, Charles

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

H01L 218242

Patent

active

060016868

ABSTRACT:
A method of fabricating a capacitor on a bit line of a DRAM. A substrate having a gate, a bit line, a source/drain region and an insulating layer covering the gate and the bit line is provided. A first conductive layer and an oxide layer are formed successively on the insulating layer. The oxide layer and the first conductive layer are defined to form a contact hole to expose the source/drain region. An insulating spacer is formed on the sidewall of the contact hole, and the first conductive layer and the second conductive layer are defined so they may be used as a lower electrode. A dielectric layer is formed on the first conductive layer and the second conductive layer. A third conductive layer as an upper electrode of a capacitor is formed on the dielectric layer.

REFERENCES:
patent: 5857876 (1998-05-01), Jenq

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