Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-04-23
1999-12-07
Niebling, John F.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438264, 438258, H01L 21336
Patent
active
059982624
ABSTRACT:
A method for manufacturing EPROM tunnel oxide cell having a damage-free source region. The method comprises the step of providing a substrate having a device region formed thereon, and then forming an ion-implanted region in the device area. Next, a gate oxide layer is formed over the substrate. Subsequently, a floating gate, a dielectric layer, a control gate and an oxide layer are sequentially formed above the substrate. This invention utilizes the implantation of a moderately heavy dose of ions into a device area prior to the formation of the gate oxide layer, so that a thicker gate oxide layer is formed above the source region. Hence, when the first polysilicon layer is etched in a subsequent self-aligned etching operation to establish the common source region, the thicker gate oxide layer can serve as a protective layer for the source region.
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Lindsay Jr. Walter L.
Niebling John F.
Worldwide Semiconductor Manufacturing Corp.
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