Method of fabricating dual cylindrical capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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H01L 218242

Patent

active

059982594

ABSTRACT:
A method of fabricating a dual cylindrical capacitor in a DRAM. A semiconductor substrate comprising a gate, a source/drain region, field oxide layer, a first oxide layer covering the whole semiconductor substrate, and a poly-via penetrating through the first oxide layer to electrically connect the source/drain region is provided. A first poly-silicon layer is formed on the first oxide layer and the poly-via. A silicon nitride layer is formed and patterned on the first poly-silicon layer and aligned with the poly-via. An oxide spacer is formed on a side wall of the silicon nitride layer, so that a part of the first poly-silicon layer is covered by the oxide spacer. A part of the first poly-silicon layer is removed with the oxide spacer and the silicon nitride layer as a mask until the first oxide layer is exposed. The silicon nitride layer is removed. A poly-silicon spacer is formed around the oxide spacer. The oxide spacer is removed, so that the remaining first poly-silicon layer and the poly-silicon spacer are combined as a bottom electrode. A dielectric layer is formed on a surface of the electrode. A top electrode is formed on the dielectric layer.

REFERENCES:
patent: 5940701 (1999-08-01), Tseng
patent: 5940713 (1999-08-01), Green

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