Method of fabricating an air-gap spacer of a metal-oxide-semicon

Details Method of fabricating an air-gap spacer of a metal-oxide-semicon Method of fabricating an air-gap spacer of a metal-oxide-semicon

1998-01-20

1999-10-26

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438422, 438595, H01L 21336

Patent

active

059727632

ABSTRACT:
A method of fabricating an air-gap spacer of a metal-oxide-semiconductor device includes the following steps. First, a substrate having a gate oxide layer and a polysilicon layer successively formed is provided. The polysilicon layer and the gate oxide layer are patterned to form a gate electrode region. A silicon nitride layer and an oxide layer are successively formed on the surface of the substrate and the surface of the gate electrode region. The oxide layer and the silicon nitride layer are anisotropically etched to form a cross-sectional L-shaped silicon nitride layer and a first spacer at the sidewall of the gate electrode region. After the first spacer is removed, an ion implantation is performed to form an extended lightly doped region below the L-shaped silicon nitride layer in the substrate and a lightly doped region in the substrate surrounding the extended lightly doped region. A second spacer is formed at the sidewall of the L-shaped silicon nitride layer wherein the second spacer covers the L-shaped silicon nitride layer. An ion implantation process is performed to form source/drain regions, using the second spacer and the gate electrode region as masks. The L-shaped silicon nitride layer is removed to form an L-shaped air-gap region.

REFERENCES:
patent: 5661049 (1997-08-01), Lur et al.
patent: 5736446 (1998-04-01), Wu
patent: 5770507 (1998-06-01), Chen et al.

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