Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-11-25
1999-10-26
Chang, Joni
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438254, H01L 218242
Patent
active
059727489
ABSTRACT:
A first interlayer insulating film having a second contact hole is formed on a main surface of a semiconductor substrate 1 in a peripheral circuitry. A second plug electrode of the same material as a first plug electrode in a memory cell array is formed in the second contact hole. A pad layer is formed over the second plug electrode and a top surface of the first interlayer insulating film. The pad layer and a capacitor lower electrode are made of the same material. The pad layer is covered with the second interlayer insulating film. A third contact hole is formed at a portion of the second interlayer insulating film located above the pad layer. A first aluminum interconnection layer is formed in the third contact hole. Thereby, a contact can be formed easily between the interconnection layer and the main surface of the semiconductor substrate in the peripheral circuitry of a DRAM, and a manufacturing process can be simplified.
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Itoh Hiromi
Kashihara Keiichiro
Okudaira Tomonori
Chang Joni
Mitsubishi Denki & Kabushiki Kaisha
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