Intra-LSI clock distribution circuit

Electronic digital logic circuitry – Significant integrated structure – layout – or layout...

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

327297, 327295, H03K 1900, H03K 500

Patent

active

054303974

ABSTRACT:
An intra-LSI clock distribution circuit which includes a main distribution circuit, a plurality of intra-block clock distribution circuitries, feedback wires provided in association with each of blocks and each connected to one of plural block-based clock signal wires within the associated block and the intra-block distribution circuitry of the associated block for feeding back the intra-block clock signal distributed to a given one of circuit elements connected to the intra-block clock signal wires to the intra-block clock distribution circuitry of that block. The intra-block clock distribution circuitry in each of the blocks responds to the block-destined clock signal supplied to the associated block via one of the block-based clock signal wires connected thereto and the intra-block clock signals fed back via the feedback wires in the associated block to thereby generate a plurality of intra-block clock signals having respective phases which depend on differences in phase between the block-destined clock signal and the fed-back intra-block clock signals.

REFERENCES:
patent: 5013942 (1991-05-01), Nishimura et al.
patent: 5043596 (1991-08-01), Masuda et al.
patent: 5140184 (1992-08-01), Hamamoto et al.
patent: 5172330 (1992-12-01), Watanabe et al.
patent: 5184027 (1993-02-01), Masuda et al.
patent: 5239215 (1993-08-01), Yamaguchi
patent: 5264746 (1993-11-01), Ohmae et al.
patent: 5270592 (1993-12-01), Takahashi et al.
1992 Symposium on VLSI Circuits Digest of Technical Pages, "Clocking Strategies In Hig Performance Processors", pp. 50-53, Feb. 1992, Horowitz.
ISSCC 92 Session 6/Microprocessors/Paper TA 6.1, Jun. 1992, IEEE International Solid-State Circuits Conference, "A 100 MHZ Macropipelined CISC Microprocessor", Badeau et al., pp. 104-105.
ISSCC 92 Session 6/Microprocessors/Paper TA 6.1, Jun. 1992, IEEE International Solid-State Circuits Conference, "A 200 mhz 64b Dual-Issue CMOS Microprocessor", Dobberpuhl et al., pp. 106-107.
ISSCC 92 Session 6/Microproessors/Paper TA 6.1, Jun. 1992, IEEE International Solid-State Circuits Conference, "A Three-Million Transistor Microprocessor", Abu-Nofal et al., pp. 108-109.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Intra-LSI clock distribution circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Intra-LSI clock distribution circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Intra-LSI clock distribution circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-763012

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.