Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257314, 257355, 257371, 257544, 327143, H01L 2972

Patent

active

060406100

ABSTRACT:
A semiconductor device comprises a chip including a MISFET having a source and a drain, in which one of the source and the drain is connected to a second current supply node, an impedance element having a first terminal connected to the other of the source and the drain and a second terminal connected to a first current supply node, and a switching element, in which a well or a body electrode of the MISFET has an active state and a standby state, and is connected to a bias voltage generator for generating different voltages through the switching element, the threshold voltage V.sub.ths during standby state of the MISFET is higher than the threshold voltage V.sub.tha during active state of the MISFET, a voltage applied to a gate of the MISFET being able to take two stationary values, and the following relationship is satisfied V.sub.DD (1-V.sub.ths /V.sub.DD)<V.sub.ths -V.sub.tha, where V.sub.DD represents the higher voltage among the two stationary values.

REFERENCES:
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patent: 4460835 (1984-07-01), Masuoka
patent: 4660835 (1987-04-01), Masuoka
Tadahiro Kuroda, et al., "A 0.9-V, 150-MHZ, 10-mW, 4 mm.sup.2, 2-D Discrete Cosine Transform Core Processor with Variable Threshold-Voltage (VT) Scheme," IEEE Journal of Solid-State Circuits, vol. 31, No. 11, (Nov. 1996), pp. 1770-1779.
Shin'ichiro Mutoh, et al., "1-V Power Supply High-Speed Digital Circuit Technology with Multithreshold-Voltage CMOS," IEEE Journal of Solid-State Circuits, vol. 30, No. 8, (Aug. 1995), pp. 847-854.
S. Thompson et al., "Dual Threshold Voltages and Substrate Bias: Keys to High Performance, Low Power, 0.1 .mu.m Logic Designs," 1997 Symposium on VLSI Technology Digest of Technical Papers, pp. 69-70, Jan.
Fariborz Assaderaghi, et al., "A Dynamic Threshold Voltage MOSFET (DTMOS) for Ultra-Low Voltage Operation," IEDM 94, pp. 809-812., Jan.
J. Chen, et al., "Subbreakdown Drain Leakage Current in MOSFET," IEEE Electron Device Letters, vol. EDL-8, No. 11, (Nov. 1987), pp. 515-517.

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