Method of manufacturing semiconductor devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438149, H01L 21265

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active

060402245

ABSTRACT:
A microscopic interconnection pattern and a gate electrode can be prevented from being deformed when a first region requiring high temperature heating, such as a source-drain region and a second region which should be prevented from being heated at high temperature, such as a microscopic interconnection pattern and a gate electrode are formed on the same semiconductor substrate. A first region which requires high temperature heating and a second region which should be avoided from being heated at high temperature are formed on a semiconductor substrate. In that case, the second region is composed of a narrow portion (1) and wide portions (2) wider than the narrow portion (1) formed on respective ends of the narrow portion 1. Then, the semiconductor substrate is photo-annealed.

REFERENCES:
patent: Re28703 (1976-02-01), Te Velde et al.
patent: 4431459 (1984-02-01), Teng
patent: 4432133 (1984-02-01), Furuya
patent: 4468855 (1984-09-01), Sasaki
patent: 5308998 (1994-05-01), Yamazaki et al.
patent: 5399506 (1995-03-01), Tsukamoto
patent: 5401666 (1995-03-01), Tsukamoto
patent: 5424244 (1995-06-01), Zhang et al.
patent: 5474945 (1995-12-01), Yamazaki et al.
Japanese Abstract, JP6 77155, Mar. 18, 1994.

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