Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-06-16
2000-03-21
Quach, T. N.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438238, 438453, 438564, 438586, H01L 21283, H01L 21336
Patent
active
060402210
ABSTRACT:
A semiconductor processing method of forming a field effect transistor gate over a semiconductor substrate includes forming a gate dielectric layer over substrate active area while a buried contact mask to said active area is in place. A field effect transistor gate is formed over the gate dielectric layer. A semiconductor processing method of forming a conductive line over a substrate active area includes forming a buried contact mask within a substrate active area from only a portion of a prior used field oxide mask. With the buried contact mask in place, a conductive line is formed that overlies the substrate active area. A semiconductor processing method of forming an electrical connection to a buried contact area of a substrate includes forming a buried contact mask in a substrate active area from a prior used field oxide mask. With the buried contact mask in place, a first conductive line is formed over at least some of the active area adjacent the buried contact mask. The buried contact mask is removed to expose a buried contact area. A second conductive line a portion of which overlies the buried contact area is formed to make electrical connection therewith and a portion of which is spaced elevationally from the first conductive line. Other aspects are contemplated.
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patent: 4380481 (1983-04-01), Shimbo
patent: 4748134 (1988-05-01), Holland et al.
patent: 5393689 (1995-02-01), Pfiester et al.
patent: 5681778 (1997-10-01), Manning
Ghandhi, S.K., VLSI Fabrication Principles, John Wiley & Sons, 1983, pp. 576-582.
Micro)n Technology, Inc.
Quach T. N.
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