Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-03-05
1998-11-03
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438257, H01L 21336
Patent
active
058307940
ABSTRACT:
Methods of fabricating electrically alterable non-volatile semiconductor memory cells are provided. The methods include the steps of forming consecutively two paris of side walls defined at least partially by a floating gate, a control gate and dielectric layers to which dopant implantation into source region is self-aligned. Using such side walls provides accurate channel lengths of select gate transistors for uniform memory cell characteristics.
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Kusunoki Masanori
Tanaka Makoto
Lebentritt Michael S.
Ricoh & Company, Ltd.
Tsai Jey
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