Semiconductor device and method of manufacture thereof

Details Semiconductor device and method of manufacture thereof Semiconductor device and method of manufacture thereof

1998-10-27

2000-02-29

Picardat, Kevin M.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438299, 438301, H01L 21336

Patent

active

060308761

ABSTRACT:
In the manufacture of a semiconductor device having a logic section and a memory section built in the same chip, a thin layer of refractory metal (titanium: Ti) is deposited by sputtering in the logic section with the entire memory section covered with a layer of silicon nitride and, when heated subsequently, a layer of silicide (titanium disilicide: TiS.sub.2) is formed. Unreacted metal is then removed by means of a wet process, allowing silicide to be formed selectively. In this case, since silicide is not formed on silicon nitride nor silicon oxide, no silicide is formed on diffused layers (source/drain regions of MOSFETs) in the memory section covered with the silicon nitride layer.

REFERENCES:
patent: 5409853 (1995-04-01), Yu
patent: 5656519 (1997-08-01), Mogami
patent: 5693550 (1997-12-01), Torii
patent: 5716862 (1998-02-01), Ahmad et al.
patent: 5723377 (1998-03-01), Torii
patent: 5736442 (1998-04-01), Mori
patent: 5851890 (1998-12-01), Tsai et al.
patent: 5874330 (1999-02-01), Ahn
patent: 5882973 (1999-03-01), Garder et al.

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