Electro-static discharge protection structure for semiconductor

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257356, 257357, 257360, 257546, H01L 2362, H01L 2900

Patent

active

060970669

ABSTRACT:
The structure includes a plurality of first ring shape structure formed on a semiconductor wafer to act as the gates of the MOS devices. The areas in the inner side of the first ring shape structures are drain regions. A plurality of source regions having second ring shape structures are formed around each sides the first ring shape structures. A p conductive type region is formed in the wafer adjacent to the source regions. A third ring shape structure is formed in the semiconductor wafer to surround the p+conductive type region for serving as a guard ring.

REFERENCES:
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patent: 5714784 (1998-02-01), Ker et al.
patent: 5831316 (1998-11-01), Yu et al.
patent: 5838050 (1998-11-01), Ker et al.
patent: 5852315 (1998-12-01), Ker et al.
patent: 5905287 (1999-05-01), Hirata
Khurana et al., "ESD on CHMOS Device--Equivalent Circuits, Physical Models and Failure Mechanisms", 1985 IEEE, pp. 212-223.
Lee et al., "An Analytical Model of Positive H.B.M. ESD Current Distribution and The Modified Multi-Finger Protection Structure", 1999 IEEE, pp. 162-167.

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