Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-01-21
1999-10-12
Booth, Richard
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438672, 438674, 438675, 438692, 438700, H01L 2144, H01L 21302, H01L 21461
Patent
active
059666323
ABSTRACT:
The present invention is related to a method of fabricating borderless metal to contact structure. A dielectric layer is deposited on the silicon semiconductor wafer. The first photoresist pattern is formed by the conventional lithography technique. Then, the dielectric layer is partially etched to formed the first trench and second trench. The first trench is used as a contact hole, while the second trench is for second metal interconnection line. Thereafter, the second photoresist pattern which is only exposing the first trench region is formed. By using the second photoresist pattern as an etching mask, the dielectric layer is etched through to form the contact which is the place for the first metal line and second metal line to be electrically contacted. After the first and second photoresist patterns are stripped, the second metal layer is deposited to fill into the contact and the second trench as second metal interconnection lines. Finally, the second metal layer and a portion of the second dielectric layer are polished by chemical mechanical polishing (CMP) technique to planarize the wafer surface. A borderless metal to contact structure according to the present invention is achieved.
REFERENCES:
patent: 5691238 (1997-11-01), Avanzino et al.
patent: 5726098 (1998-03-01), Tsuboi
patent: 5801099 (1998-09-01), Kim et al.
Chen Min-Liang
Tang Rebecca Yicksin
Booth Richard
Jones Josetta
Mosel Vitelic Inc.
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