Semiconductor device having an improved trench isolation and met

Details Semiconductor device having an improved trench isolation and met Semiconductor device having an improved trench isolation and met

1997-08-15

1999-10-12

Wojciechowicz, Edward

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438225, 438228, 438296, 438424, 438631, 257263, 257304, 257329, 257511, 257514, 257517, H01L 2972

Patent

active

059665980

ABSTRACT:
The invention provides a trench isolation structure comprising a semiconductor region, a first insulation film formed on a top surface of the semiconductor region, a trench groove extending vertically from the first insulation film into the semiconductor region so that a bottom of the trench groove lies below an interface between the first insulation film and the semiconductor region, and an inter-layer insulator being formed which resides not only on the first insulation film but also within the trench groove so that the inter-layer insulator fills up the trench groove.
The present invention still further provides a method for forming a trench isolation in a semiconductor region. The method comprises the following steps. A first insulation film is formed on a top surface of a semiconductor region. A trench groove is selectively formed which extends vertically from the first insulation film into the semiconductor region so that a bottom of the trench groove lies below an interface between the first insulation film and the semiconductor region. An inter-layer insulator is formed which resides not only on the first insulation film but also within the trench groove so that the inter-layer insulator fills up the trench groove. The trench groove is formed after the device is formed in the semiconductor region.

REFERENCES:
patent: 3818289 (1974-06-01), Mudge et al.

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