Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1985-10-16

1986-10-07

Fears, Terrell W.

Static information storage and retrieval

Read/write circuit

Precharge

365219, 365238, G11C 1140, G11C 1300

Patent

active

046163433

ABSTRACT:
A semiconductor memory device including a random access memory cell array, a series/parallel data transfer circuit, transfer gate, an active pull-up circuit, and an active pull-down circuit. The transfer gate is inserted between bit lines of the random access memory cell array and the series/parallel data transfer circuit to carry out parallel transfer of data. Output data of the series/parallel data transfer circuit is simultaneously written in a group of memory cells of selected work lines by turning on the transfer gate and selection of a word line. When data of each output of steps of the series/parallel data transfer circuit is logic "1", the active pull-up circuit charges up a selected bit line of the random access memory cell array. When data of each output of steps of the series/parallel data transfer circuit is logic "0", the active pull-down circuit discharges a selected bit line of the random access memory cell array. One or more of the active pull-up and active pull-down circuits is arranged in the semiconductor memory device.

REFERENCES:
patent: 4402067 (1983-08-01), Moss et al.

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