MIS transistor circuit

Static information storage and retrieval – Read/write circuit – Precharge

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365205, 365210, G11C 700

Patent

active

045787816

ABSTRACT:
An MIS transistor circuit which is operated alternately in a reset state and in an active state, comprises a voltage holding circuit for holding a power supply voltage applied in each reset state so as to provide a clamped voltage. The clamped voltage is applied during each active state to the desired nodes of the MIS transistor circuit as an actual power supply voltage, whereby error operation due to voltage fluctuation of the power supply voltage is prevented.

REFERENCES:
patent: 4061999 (1977-12-01), Proebsting et al.
patent: 4291393 (1981-09-01), Wilson
patent: 4387448 (1983-06-01), Takemae et al.
patent: 4503343 (1985-03-01), Ohuchi

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