Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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Details

257435, 257773, H01L 2968

Patent

active

052910466

ABSTRACT:
A control gate formed on top of an insulation layer over a floating gate for a transistor element of a memory cell in a redundancy ROM is shaped in a form covering not only the top but also the sides of the floating gate. A drain electrode wiring conventionally connected through a well is directly connected to a drain diffusion area. This enables the redundancy ROM to be miniaturized and the voltage fall at the edge of a drain diffusion area to be reduced.

REFERENCES:
patent: 4115914 (1978-09-01), Harari
patent: 4758869 (1988-07-01), Eitan et al.
patent: 4988635 (1991-01-01), Ajika et al.
patent: 5021848 (1991-06-01), Chiu

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