Method of manufacturing a DRAM capacitor

Details Method of manufacturing a DRAM capacitor Method of manufacturing a DRAM capacitor

1998-12-09

2000-08-22

Zarabian, Amir

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438396, 437 52, H01L 218234

Patent

active

061071323

ABSTRACT:
A method of manufacturing a DRAM capacitor comprises the steps of providing a substrate having a word line, a source/drain region, a bit line and a first insulator layer. A hard mask layer and a second insulator layer are formed on the first insulator layer in sequence. Next, an opening is formed to expose a portion of the first insulator layer by patterning the second insulator layer and the hard mask layer. Thereafter, a spacer is formed on the side wall of the opening and a node contact hole is formed to expose a portion of the source/drain region in the first insulator layer. The second insulator layer is stripped to expose the hard mask layer and a conductive layer is formed over the hard mask layer and fills the node contact hole. A bottom electrode is formed by patterning the conductive layer and a dielectric layer and another conductive layer are formed over the bottom electrode in sequence.

REFERENCES:
patent: 5429980 (1995-07-01), Yang et al.
patent: 5728617 (1998-03-01), Tseng
patent: 5851876 (1998-12-01), Jenq

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