Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-10-29
1999-12-21
Niebling, John F.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438683, 438656, H01L 213205
Patent
active
060048727
ABSTRACT:
A method of manufacturing a semiconductor device, comprises the steps of, preparing a silicon substrate having a source region, a drain region, a gate electrode and an SiO.sub.2 film formed on one surface, depositing titanium on the one surface of the silicon substrate by CVD using a high frequency plasma of a low density to form a TiSi.sub.2 layer having a C54 crystal phase, so that the TiSi.sub.2 layer covers the source and drain regions and gate electrode, and a Ti layer covers the SiO.sub.2 film. The Ti layer formed on the SiO.sub.2 film is removed by a selective etching.
REFERENCES:
patent: 4957777 (1990-09-01), Ilderem et al.
patent: 5510295 (1996-04-01), Cabral, Jr. et al.
patent: 5545574 (1996-08-01), Chen et al.
Tada Kunihiro
Tezuka Yoshihiro
Murphy John
Niebling John F.
Tokyo Electron Limited
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