Dynamic random access memory with internally gated RAS

Static information storage and retrieval – Read/write circuit – Precharge

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Details

365193, 365233, G11C 1300

Patent

active

049982222

ABSTRACT:
A dynamic random access memory having a bit line precharge capability is provided with an internally gated RAS signal, such that bit line precharge operation does not being until an internal timing signal is issued indicating completion of the read/write internal timing chains. The external RAS signal is made to transition prematurely into an inactive (or precharge) state, so that the bit line precharge operation necessarily occurs immediately after the internal timing chains are completed. This occurs independent of any circuit fabrication variations or component tolerances.

REFERENCES:
patent: 4322825 (1982-03-01), Nagami
patent: 4581722 (1986-04-01), Takemae
patent: 4734880 (1988-03-01), Collins
patent: 4802129 (1989-01-01), Hoekstra et al.

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