Connecting a short word length non-volatile memory to a long wor

Details Connecting a short word length non-volatile memory to a long wor Connecting a short word length non-volatile memory to a long wor

1993-11-12

1995-09-05

Nguyen, Viet Q.

Static information storage and retrieval

Read/write circuit

Multiplexing

36523002, 365 63, 395307, 395410, G11C 800

Patent

active

054485215

ABSTRACT:
A system and method for connecting a short word length memory to a significantly wider bus operated in an address/data multiplexing mode. A mode of operation is defined for the bus whereby the bus lines are divided for purposes of memory accessing into a data group and an address group. The data group is operable bidirectionally to read or write memory, using the addresses provided on the group of address lines. This architecture and practice is particularly suited for a boot ROM used with processors, in that such ROMs are normally of relatively short word length while the processors are of relatively long word length and are accordingly connected to buses of similar long word length. Bridge logic interfaces the processor bus to the ROM for sequencing, timing and supplemental control in converting the data from the ROM format to the processor format.

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"Bus Size Independent Architecture", IBM TDB, vol. 28, No. 8, Jan./86, pp. 3579-3581.

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