Semiconductor memory device having a register

Details Semiconductor memory device having a register Semiconductor memory device having a register

1988-06-22

1990-02-06

Heinz, A. J.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

36523003, 365 78, 340799, G11C 1140, G11C 1300

Patent

active

048993107

ABSTRACT:
A semiconductor memory device having a register and a memory cell array includes a controlling circuit for disconnecting an input/output circuit from a data bus and turning OFF a transfer gate provided between the register and data bus in a first operation mode and for connecting the input/output circuit to the data bus and turning ON the transfer gate in a second operation mode. In the first operation mode, a data read or write operation is performed between the memory cell array and an external circuit, and alternatively in the second operation mode the data read or write operation is performed between the register and the external circuit.

REFERENCES:
patent: 4740923 (1988-04-01), Kaneko et al.
patent: 4745577 (1988-05-01), Ogawa et al.
patent: 4747081 (1988-05-01), Heilveil et al.
patent: 4758988 (1988-07-01), Kuo
patent: 4796231 (1989-01-01), Pinkham
patent: 4807189 (1989-02-01), Pinkham et al.

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