Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2010-02-11
2011-12-06
Lee, Cheung (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S164000, C438S763000, C438S785000, C257SE21280, C257SE21625
Reexamination Certificate
active
08071447
ABSTRACT:
A semiconductor device manufacturing method includes removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into an insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the substrate, and oxygen.
REFERENCES:
patent: 2006/0177997 (2006-08-01), Lin et al.
patent: 2008/0220582 (2008-09-01), Yagishita et al.
patent: 2009/0114996 (2009-05-01), Inumiya et al.
patent: 2006-339514 (2006-12-01), None
patent: 2008-72001 (2008-03-01), None
Suzuki, M. et al., “Ultra-Thin (EOT=3Å) and Low Leakage Dielectrics of La-Alminate Directly on Si Substrate Fabricated by High Temperature Deposition,” IEDM Tech. Dig., pp. 445-448, (Dec. 2005).
Kubicek, S. et al., “Strain Enhanced Low-VTCMOS Featuring La/AI-doped HfSiO/TaC and 10ps Invertor Delay,” 2008 Symposium on VLSI Technology Digest of Technical Papers, pp. 130-131, ( Jun. 2008).
Tatsumura, K. et al., “Intrinsic Correlation between Mobility Reduction and Vtshift due to Interface Dipole Modulation in HfsiON/SiO2stack by La or AI addition,” IEDM Tech. Dig., pp. 25-28, (Dec. 2008).
Suzuki, M. et al., “Lanthanum Aluminate Gate Dielectric Technology with Direct Interface,” Toshiba Corporation Review, vol. 62, No. 2, pp. 37-41, (2007).
Aoyama Tomonori
Inumiya Seiji
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Lee Cheung
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