Multi-strobe circuit

Details Multi-strobe circuit Multi-strobe circuit

2009-07-07

2011-11-08

Trimmings, John (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S724000, C714S731000, C714S736000, C714S742000, C714S745000, C714S025000, C714S709000, C714S718000, C714S719000, C714S723000, C365S200000, C365S201000, C702S057000, C702S069000, C702S072000, C702S079000, C702S117000, C702S125000

Reexamination Certificate

active

08055969

ABSTRACT:
A multi-strobe circuit that latches a signal to be tested, an evaluation target, at each edge timing of a multi-strobe signal having a plurality of edges. An oscillator oscillates at a predetermined frequency in synchronization with a reference strobe signal. A latch circuit latches the signal to be tested at an edge timing of an output signal of the oscillator. A gate circuit is provided between a clock terminal of the latch circuit and the oscillator, and makes the output signal of the oscillator pass therethrough for a predetermined period. A clock transfer circuit loads the output signal of the latch circuit at an edge timing of the output signal of the oscillator and performs retiming on the output signal of the latch circuit by using a reference clock.

REFERENCES:
patent: 6996032 (2006-02-01), Ganry
patent: 7406646 (2008-07-01), Sato et al.
patent: 7461316 (2008-12-01), Hasegawa et al.
patent: 7512872 (2009-03-01), Awaji et al.
patent: 2005/0025190 (2005-02-01), Frisch
patent: 2005/0149801 (2005-07-01), Oshima
patent: 2005/0219937 (2005-10-01), Sato
patent: 2006/0041799 (2006-02-01), Sato
patent: 2006/0195740 (2006-08-01), Huott et al.
patent: 2007/0067686 (2007-03-01), Khondker et al.

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