Scan chain circuit and method

Details Scan chain circuit and method Scan chain circuit and method

2008-12-12

2011-10-11

Tabone, Jr., John J (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S729000, C714S726000, C714S742000, C714S724000, C324S750300, C324S762010

Reexamination Certificate

active

08037385

ABSTRACT:
A scan chain circuit is disclosed. The scan chain circuit includes a chain of serially coupled clocked circuits. In a first mode of operation, each of the clocked circuits toggles in response to a rising edge of a clock signal. In a second mode of operation, a first set of the clocked circuits in the chain of serially coupled clocked circuits toggle in response to the rising edge of the clock signal and a second set of the clocked circuits in the chain of serially coupled clocked circuits toggle in response to a falling edge of the clock signal.

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International Search Report—PCT/US2009/067661, International Search Authority—European Patent Office Mar. 17, 2010.
Written Opinion—PCT/ US2009/067661, International Search Authority—European Patent Office Mar. 17, 2010.

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