Method for manufacturing semiconductor device, and...

Details Method for manufacturing semiconductor device, and... Method for manufacturing semiconductor device, and...

2010-04-20

2011-12-06

Ahmadi, Mohsen (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S197000, C438S267000, C438S270000, C438S276000, C438S277000, C257SE21410, C257SE21545, C257SE21585, C257SE21621, C257SE21629

Reexamination Certificate

active

08071445

ABSTRACT:
In a transistor region, a source interconnect layer and a gate electrode are buried in trenches. A source extending region is provided adjacent to the transistor region or in the transistor region, and a source interconnect layer is designed to protrude from the upper end of a trench. This source interconnect layer is connected to a source electrode formed in the transistor region immediately above the trench. A gate extending region is provided outside the source extending region, and the gate electrode and a gate interconnect layer are connected. The gate electrode is formed by performing etchback without forming a resist pattern, after a polysilicon film is formed. Here, the polysilicon film remains like a side-wall on the sidewall of the portion of the source interconnect layer protruding from the upper end of the trench.

REFERENCES:
patent: 2002/0036319 (2002-03-01), Baliga
patent: 2004/0056284 (2004-03-01), Nagaoka et al.
patent: 2007/0228518 (2007-10-01), Yilmaz et al.
patent: 2009/0315083 (2009-12-01), Pan et al.
patent: 2010/0084706 (2010-04-01), Kocon
patent: 2010/0123214 (2010-05-01), Chen et al.
patent: 2010/0163950 (2010-07-01), Gladish et al.
patent: 2005-505912 (2005-02-01), None

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