Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2010-04-20
2011-12-27
Lebentritt, Michael (Department: 2829)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S222000, C438S285000, C438S300000, C257SE21619, C257SE21634
Reexamination Certificate
active
08084318
ABSTRACT:
A method of fabricating an integrated circuit device includes forming first and second gate patterns on surfaces of a semiconductor substrate in PMOS and NMOS regions, respectively, of the substrate. P-type source/drain regions are epitaxially grown on opposite sides of the first gate pattern in the PMOS region to exert compressive stress on a first channel region therebetween adjacent the first gate pattern. N-type source/drain regions are epitaxially grown on opposite sides of the second gate pattern in the NMOS region to exert tensile stress on a second channel region therebetween adjacent the second gate pattern. Related devices are also discussed.
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Notice to Submit Response corresponding to Korean Application No. 10-2007-0014562.
Kim Ki-chul
Lee Ho
Lee Jung-deog
Lebentritt Michael
Myers Bigel Sibley & Sajovec P.A.
Samsung Electronic Co. Ltd.
Whalen Daniel
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