Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-08-19
2011-12-06
Sandvik, Benjamin (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S176000, C257S900000, C257S903000, C257SE27098
Reexamination Certificate
active
08071448
ABSTRACT:
A disclosed semiconductor device includes multiple gate electrodes disposed on a semiconductor substrate; and multiple sidewall spacers disposed on sidewalls of the gate electrodes. The thickness of the sidewall spacers is larger on the sidewalls along longer sides of the gate electrodes than on the sidewalls along shorter sides of the gate electrodes.
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M. Kanda et al., “Highly Stable 65 nm Node (CMOS5) 0.56 m m2 SRAM Cell Design for Very Low Operation Voltage”, 2003 Symposium on VLSI Technology Digest of Technical Papers, pp. 13-14.
International Search Report of PCT/JP2007/055351, date of mailing Jun. 19, 2007.
Fujitsu Semiconductor Limited
Sandvik Benjamin
Schoenholtz Joseph
Westerman Hattori Daniels & Adrian LLP
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