Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2009-07-30
2011-10-18
Garber, Charles (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S166000, C438S486000, C438S525000, C257SE21057, C257SE21059, C257SE21412
Reexamination Certificate
active
08039349
ABSTRACT:
Embodiments of a method are provided for fabricating a non-planar semiconductor device including a substrate having a plurality of raised crystalline structures formed thereon. In one embodiment, the method includes the steps of amorphorizing a portion of each raised crystalline structure included within the plurality of raised crystalline structures, forming a sacrificial strain layer over the plurality of raised crystalline structures to apply stress to the amorphized portion of each raised crystalline structure, annealing the non-planar semiconductor device to recrystallize the amorphized portion of each raised crystalline structure in a stress-memorized state, and removing the sacrificial strain layer.
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patent: 2006/0076643 (2006-04-01), Breitwisch et al.
patent: 2007/0105299 (2007-05-01), Fang et al.
patent: 2007/0249130 (2007-10-01), Anderson et al.
patent: 2009/0072276 (2009-03-01), Inaba
patent: 2009/0114955 (2009-05-01), Stapelmann et al.
Hargrove Michael J.
Johnson Frank Scott
Luning Scott
Garber Charles
GLOBALFOUNDRIES Inc.
Ingrassia Fisher & Lorenz P.C.
Lee Cheung
LandOfFree
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