Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2007-01-18
2011-11-08
Landau, Matthew (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S197000, C438S298000, C257SE29081, C257SE29104
Reexamination Certificate
active
08053320
ABSTRACT:
An aspect of the present invention provides a semiconductor device that includes a first conductivity type semiconductor body, a source region in contact with the semiconductor body, whose bandgap is different from that of the semiconductor body, and which formed heterojunction with the semiconductor body, a gate insulating film in contact with a portion of junction between the source region and the semiconductor body, a gate electrode in contact with the gate insulating film, a source electrode, a low resistance region in contact with the source electrode and the source region, and connected ohmically with the source electrode, and a drain electrode connected ohmically with the semiconductor body.
REFERENCES:
patent: 4636823 (1987-01-01), Margalit et al.
patent: 5672889 (1997-09-01), Brown
patent: 5693569 (1997-12-01), Ueno
patent: 5696396 (1997-12-01), Tokura et al.
patent: 6033969 (2000-03-01), Yoo et al.
patent: 6057558 (2000-05-01), Yamamoto et al.
patent: 6150693 (2000-11-01), Wollesen
patent: 6246077 (2001-06-01), Kobayashi et al.
patent: 6262439 (2001-07-01), Takeuchi et al.
patent: 6426248 (2002-07-01), Francis et al.
patent: 6504176 (2003-01-01), Yokogawa et al.
patent: 6849519 (2005-02-01), Dong
patent: 2002/0009867 (2002-01-01), Numazawa et al.
patent: 2003/0042491 (2003-03-01), Kumar et al.
patent: 2004/0079989 (2004-04-01), Kaneko et al.
patent: 2005/0045892 (2005-03-01), Hayashi et al.
patent: 2005/0095808 (2005-05-01), Chiu et al.
patent: 2006/0057795 (2006-03-01), Chakihara et al.
patent: 06-053514 (1994-02-01), None
patent: 06-314791 (1994-11-01), None
patent: 09-199721 (1997-07-01), None
patent: 10-173178 (1998-06-01), None
patent: 10-233503 (1998-09-01), None
patent: 2003-218398 (2003-07-01), None
patent: 2003-318398 (2003-11-01), None
patent: WO 97/47045 (1997-12-01), None
Afanasev, V. V., et al., “Intrinsic SiC/SiO2Interface States” Phys. Stat. Sol. (A) 162, 321 (1997), pp. 321-337.
J. Tan et al., “High-Voltage Accumulation-Layer UMOSFET's in 4H-SiC,” IEEE Electronic Device Letters, vol. 19, No. 12, Dec. 1998.
European Search Report issued in European Patent Application No. EP 04 02 2463.6 dated Dec. 16, 2009.
Afanasev, V. V., et al., “Intrinsic SiC/SiO2Interface States” Phys. Stat. Sol. (A) 162, 321 (1997), pp. 321-337.
Hayashi Tetsuya
Hoshi Masakatsu
Kaneko Saichirou
Tanaka Hideaki
Landau Matthew
McDermott Will & Emery LLP
Nissan Motor Co,. Ltd.
Snow Colleen E
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