Method for manufacturing a recessed gate transistor

Details Method for manufacturing a recessed gate transistor Method for manufacturing a recessed gate transistor

2008-12-27

2010-11-02

Trinh, Michael (Department: 2822)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S272000, C438S596000, C257SE21645

Reexamination Certificate

active

07824985

ABSTRACT:
A method of manufacturing a recessed gate transistor includes forming a hard mask pattern over a substrate; and then forming a trench in the substrate by performing an etching process using the hard mask pattern as an etch mask; and then performing a pullback-etching process on the hard mask pattern to expose a source region in the substrate; and then forming a gate silicon layer in the trench and over the substrate including the hard mask pattern after performing the pullback-etching process; and then performing an etch-back process on the gate silicon layer to expose the hard mask pattern such that the uppermost surface of the gate silicon layer is below the uppermost surface of the hard mask pattern; and then removing the hard mask pattern; and then simultaneously etching the gate silicon layer and the exposed portion of the substrate.

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patent: 10-2002-0081795 (2001-04-01), None
patent: 10-2004-0002411 (2004-01-01), None

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