Method of manufacturing metal line

Details Method of manufacturing metal line Method of manufacturing metal line

2008-07-22

2010-10-12

Nguyen, Ha Tran T (Department: 2829)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S422000, C438S619000, C438S692000, C257SE21581, C257SE21583, C257SE21584

Reexamination Certificate

active

07811927

ABSTRACT:
A method of manufacturing a metal line according to embodiments includes forming an interlayer dielectric layer over a semiconductor substrate. A dielectric layer is formed over the interlayer dielectric layer. A trench may be formed by etching the dielectric layer and the interlayer dielectric layer. A metal material may be disposed over the interlayer dielectric layer including the trench. A first planarization process may be performed on the metal material using the dielectric layer as an etch stop layer. A wet etch process may be performed on the semiconductor substrate subjected the first planarization process. A second planarization process may be performed on interlayer dielectric layer subjected to the wet etch process.

REFERENCES:
patent: 2003/0181050 (2003-09-01), Hu et al.
patent: 2004/0002212 (2004-01-01), Choi
patent: 2005/0151224 (2005-07-01), Abe
patent: 2006/0043590 (2006-03-01), Chen et al.

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