Memory circuit and semiconductor device including the memory...

Details Memory circuit and semiconductor device including the memory... Memory circuit and semiconductor device including the memory...

2007-10-10

2010-02-16

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Read/write circuit

Multiplexing

C365S189050, C365S205000

Reexamination Certificate

active

07663936

ABSTRACT:
A semiconductor circuit of the invention comprises: a memory cell array including a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit lines; a plurality of sense amplifiers each for amplifying data of the memory cell connected to a selected word line through the bit line; a plurality of data holding circuits each for holding data transferred from the plurality of sense amplifiers; and a plurality of selectors each for selecting a data holding circuit from a unit group including a predetermined number of the data holding circuits based on logic input data, and for externally connecting one end of the selected data holding circuit.

REFERENCES:
patent: 5455795 (1995-10-01), Nakao et al.
patent: 5463584 (1995-10-01), Hoshino
patent: 6172521 (2001-01-01), Motomura
patent: 10-285014 (1998-10-01), None

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