Semiconductor memory system with dynamic random access memory ce

Details Semiconductor memory system with dynamic random access memory ce Semiconductor memory system with dynamic random access memory ce

1987-08-13

1989-01-24

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, 365233, G11C 700, G11C 1140

Patent

active

048005304

ABSTRACT:
A dynamic random access memory system comprises first and second memory banks. A plurality of memory cells connected to a word line are grouped into first and second groups. The first group is arranged in the first memory bank and the second group is arranged in the second memory bank. Read/write means is provided in which each n bits from and to the first group and each n bits from and to the second group are read and written alternatively. Each bit is read and written in synchronism with the toggles of a column address strobe signal.

REFERENCES:
patent: 4638458 (1987-01-01), Itoh
patent: 4648077 (1987-03-01), Pinkham et al.
patent: 4688197 (1987-08-01), Novak et al.
patent: 4723226 (1988-02-01), McDonough et al.
patent: 4725987 (1988-02-01), Cates

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