Semiconductor device having transistors each having gate...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S230000, C438S305000

Reexamination Certificate

active

07816213

ABSTRACT:
A semiconductor device with integrated MIS field-effect transistors includes a first transistor containing a first gate electrode having a composition represented by MAx and a second transistor containing a second gate electrode having a composition represented by MAy, wherein M is at least one metal element selected from the group consisting of W, Mo, Ni, Pt, Ta, Pd, Co and Ti; A is silicon and/or germanium; 0<x≦3 and 0<y≦3, and x and y are different from each other.

REFERENCES:
patent: 6406743 (2002-06-01), Lee et al.
patent: 6982474 (2006-01-01), Currie et al.
patent: 7217603 (2007-05-01), Currie et al.
patent: 7495298 (2009-02-01), Hayashi et al.
patent: 7605045 (2009-10-01), Peidous et al.
patent: 7642153 (2010-01-01), Pas
patent: 7645692 (2010-01-01), Matsubara et al.
patent: 2003/0234439 (2003-12-01), Currie et al.
patent: 2005/0042849 (2005-02-01), Currie et al.
patent: 2005/0156210 (2005-07-01), Currie et al.
patent: 2006/0263961 (2006-11-01), Kittl et al.
patent: 2008/0029822 (2008-02-01), Tsuchiya et al.
patent: 2008/0211000 (2008-09-01), Matsuki
patent: 2009/0011566 (2009-01-01), Okada et al.
patent: 2009/0045469 (2009-02-01), Takahashi
patent: 2009/0057787 (2009-03-01), Matsuki et al.
patent: 2010/0078731 (2010-04-01), Tsuchiya et al.
patent: 2000-243853 (2000-09-01), None
patent: 2000-252462 (2000-09-01), None
patent: 2005-217275 (2005-08-01), None
patent: 2005-228868 (2005-08-01), None
“Scalability of Ni FUSI gate processes; phase and Vt control to 30 nm gate length,”Kittl, et al., 2005 Symposium on VLSI Technology Digest of Technical papers, p. 72-73.
“Material Characterization of Metlal-Germanide Gate Electrodes Formed by FUGE (Fully Germanided) Process, ”Tsuchiya, et al., Extended Abstract of the 2005 International Conference of Solid State Devices and Materials, Kobe, 2005, p. 844-845.
“Demonstration of Fully Ni-Silicided Metal Gates on Hf02 based high-k gate dielectrics as a candidate for low power applications,” Anil, et al., 2004 Symposium on VLSI Technology Digest of Technical papers, p. 190-191.
“CMOS Integration of Dual Work Functaion Phase Controlled Ni FUSI with Simultaneous Silicidation of NMOS (NiSi) and PMOS (Ni-rich Silicide) Gates on HfSiON,” Lauwers, et al., Technical Digest of 2005 International Electron Device Meeting, p. 661-664.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device having transistors each having gate... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device having transistors each having gate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device having transistors each having gate... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4228754

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.