Method of making nonvolatile semiconductor memory

Details Method of making nonvolatile semiconductor memory Method of making nonvolatile semiconductor memory

1996-06-28

1999-03-02

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438529, H01L 218247

Patent

active

058770542

ABSTRACT:
The nonvolatile semiconductor memory of this invention includes: a semiconductor substrate; a plurality of memory cells formed in a matrix on the semiconductor substrate, each of the memory cells including a first insulating film formed on the semiconductor substrate, a floating gate formed on the first insulating film, and a control gate formed on the floating gate via a second insulating film sandwiched therebetween, a source diffusion region, and a drain diffusion region; a diffusion layer formed in a portion of the semiconductor substrate located between two of the memory cells adjacent in a first direction, the diffusion layer including the drain diffusion region for one of the two memory cells and the source diffusion region for the other memory cell; a word line formed by connecting the control gates of the memory cells lined in the first direction; and a bit line formed by connecting the diffusion layers lined in a second direction substantially perpendicular to the first direction, wherein the memory cells have a structure in which a tunnel current flows between the drain diffusion region and the floating gate of one of the two adjacent memory cells via the first insulating film when a predetermined voltage is applied to the diffusion layers and no tunnel current flows between the diffusion layer and the floating gate of the other memory cell.

REFERENCES:
patent: 4939690 (1990-07-01), Momodomi et al.
patent: 4945068 (1990-07-01), Sugaya
patent: 5273923 (1993-12-01), Ko-Min et al.
patent: 5283758 (1994-02-01), Nakayama et al.
patent: 5379254 (1995-01-01), Chang
patent: 5516713 (1996-05-01), Chen-Chiu et al.
patent: 5521110 (1996-05-01), Manzur
Yoshikawa et al, "An Asymmetrical Lightly Doped Source Cell For Virtual Ground High-Density Eprom's", IEEE Transactions on Electron Devices, vol. 37,. No. 4, 1 Apr. 1990, pp. 1046-1051, XP000125218.
Ohi et al, "An Asymmetrical Offset Source/Drain Structure For Virtual Ground Array Flash Memory with Dinor Operation", Digest of Technical Papers of the Symposium on VLSI Technology, Kyoto, May 17-19, 1993, No. -, 17 May 1993, Institute of Electrical and Electronics Engineers, p. 57/58, XP000462904.
Hisamune et al, "A High Capacitive-Coupling Ratio (HiCR) Cell for 3 V-Only 64 Mbit and future Flash Memories", IEDM 93, 1993, pp. 19-22.
Kato et al, "A 0.4-.mu.m.sup.2 Self-Aligned Contactless Memory Cell Technology Suitable for 256-Mbit Flash Memories", IEDM 94, pp. 921-923, 1994.

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