Memory cell

Details Memory cell Memory cell

2007-12-17

2010-12-21

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S308000, C257S329000, C257S401000, C257SE21442, C257SE21621, C257SE21679

Reexamination Certificate

active

07855411

ABSTRACT:
The invention provides a memory cell. The memory cell is disposed on a substrate and comprises a plurality of isolation structures defining at least a fin structure in the substrate. Further, the surface of the fin structure is higher than the surface of the isolation structure. The memory cell comprises a doped region, a gate, a charge trapping structure and a source/drain region. The doped region is located in a top of the fin structure and near a surface of the top of the fin structure and the doped region has a first conductive type. The gate is disposed on the substrate and straddled the fin structure. The charge trapping structure is disposed between the gate and the fin structure. The source/drain region with a second conductive type is disposed in the fin structures exposed by the gate and the first conductive type is different from the second conductive type.

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Chinese First Examination Report of China Application No. 2007101611214, dated Jul. 1, 2009.
Chinese Examination Report of Taiwan Application No. 096118499, dated May 31, 2010.

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