Frequency tripling using spacer mask having interposed regions

Details Frequency tripling using spacer mask having interposed regions Frequency tripling using spacer mask having interposed regions

2007-10-19

2010-12-07

Maldonado, Julio J (Department: 2823)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S703000, C438S947000, C438S950000, C257SE21038, C257SE21023, C257SE21249, C430S311000, C430S317000

Reexamination Certificate

active

07846849

ABSTRACT:
A method for fabricating a semiconductor mask is described. A semiconductor stack having a sacrificial mask comprised of a series of lines is first provided. A spacer mask having spacer lines adjacent to the sidewalls of the series of lines of the sacrificial mask is then formed. The spacer mask also has interposed lines between the spacer lines. Finally, the sacrificial mask is removed to provide only the spacer mask. The spacer mask having interposed lines triples the frequency of the series of lines of the sacrificial mask.

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Preliminary Rejection from Korean Patent Application No. 10-2008-0050414 mailed Nov. 27, 2009, 5 pages.
Notice of Final Rejection from Korean Patent Application No. 10-2008-0050414 mailed May 28, 2010, 2 pages.

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