Multi-silicide system in integrated circuit technology

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S335000, C438S664000, C438S655000

Reexamination Certificate

active

07843015

ABSTRACT:
An integrated circuit is provided. A gate dielectric is formed on a semiconductor substrate, and a gate is formed over the gate dielectric. A sidewall spacer is formed around the gate and a source/drain junction is formed in the semiconductor substrate using the sidewall spacer. A bottom silicide metal is deposited on the source/drain junction and then a top silicide metal is deposited on the bottom silicide metal. The bottom and top silicide metals are formed into their silicides. A dielectric layer is deposited above the semiconductor substrate and a contact is formed in the dielectric layer to the top silicide.

REFERENCES:
patent: 5646070 (1997-07-01), Chung
patent: 6287967 (2001-09-01), Hsieh et al.
patent: 6468900 (2002-10-01), Bertrand et al.
patent: 6806157 (2004-10-01), Yang et al.
patent: 2003/0151069 (2003-08-01), Sugimae et al.

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