Electrical computers and digital processing systems: support – Synchronization of clock or timing signals – data – or pulses
Reexamination Certificate
2006-12-15
2010-02-09
Elamin, Abdelmoniem (Department: 2116)
Electrical computers and digital processing systems: support
Synchronization of clock or timing signals, data, or pulses
C713S401000, C713S600000, C713S601000, C713S300000, C713S321000, C713S322000, C713S323000, C713S324000, C713S330000, C713S340000
Reexamination Certificate
active
07661007
ABSTRACT:
A method for adjusting clock frequency is disclosed. The method includes halting a central processing unit (CPU) while tuning a clock frequency, thereby enabling multiple clock signals with the tuned clock frequency to be generated.
REFERENCES:
patent: 6754837 (2004-06-01), Helms
patent: 6949918 (2005-09-01), Clark et al.
patent: 7398407 (2008-07-01), Jorgenson et al.
patent: 2003/0210026 (2003-11-01), Clark et al.
patent: 2006/0136763 (2006-06-01), Jorgenson et al.
patent: 2008/0263382 (2008-10-01), Jorgenson et al.
patent: 2005025397 (2005-01-01), None
English abstract of JP2005025397, pub. Jan. 27, 2005.
Elamin Abdelmoniem
Thomas Kayden Horstemeyer & Risley
Via Technologies Inc.
LandOfFree
Methods and systems for adjusting clock frequency does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Methods and systems for adjusting clock frequency, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods and systems for adjusting clock frequency will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4178659