Device for ESD protection circuit

Details Device for ESD protection circuit Device for ESD protection circuit

2008-07-23

2010-02-02

Tran, Thien F (Department: 2895)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S336000, C257SE29256

Reexamination Certificate

active

07655980

ABSTRACT:
A LDNMOS device for an ESD protection circuit including a P-type substrate and an N-type deep well region is provided. The P-type substrate includes a first area and a second area. The N-type deep well region is in the first and second areas of the P-type substrate. The LDNMOS device further includes a gate electrode disposed on the P-type substrate between the first and second areas, a P-type implanted region disposed in the first area of the P-type substrate, an N-type grade region disposed in the N-type deep well region of the first area, an N-type first doped region disposed in the N-type grade region, a P-type body region disposed in the N-type deep well region of the second area, an N-type second doped region disposed in the P-type body region, and a P-type doped region disposed in the P-type body region and adjacent to the N-type second doped region.

REFERENCES:
patent: 6444511 (2002-09-01), Wu et al.
patent: 6838734 (2005-01-01), Ker et al.
patent: 6979875 (2005-12-01), Kwon et al.
patent: 7135743 (2006-11-01), Manna et al.

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