Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-05-23
2010-10-19
Nhu, David (Department: 2895)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S238000, C438S381000, C257SE21646, C257SE21648, C257SE27092
Reexamination Certificate
active
07816204
ABSTRACT:
A semiconductor device, having a memory cell region and a peripheral circuit region, includes an insulating film, having an upper surface, formed on a major surface of a semiconductor substrate to extend from the memory cell region to the peripheral circuit region. A capacitor lower electrode assembly is formed in the memory cell region to upwardly extend to substantially the same height as the upper surface of the insulating film on the major surface of the semiconductor substrate. Additionally, the lower electrode assembly includes first and second lower electrodes that are adjacent through the insulating film. A capacitor upper electrode is formed on the capacitor lower electrode through a dielectric film, to extend onto the upper surface of the insulating film. The capacitor lower electrode includes a capacitor lower electrode part having a top surface and a bottom surface. A semiconductor device organized as just described, permits implementation having a high density of integration while ensuring the capacitor exhibits high reliability and a constant capacitance.
REFERENCES:
patent: 5023683 (1991-06-01), Yamada
patent: 5162248 (1992-11-01), Dennison et al.
patent: 5168073 (1992-12-01), Gonzalez et al.
patent: 5208180 (1993-05-01), Gonzalez
patent: 5240871 (1993-08-01), Doan et al.
patent: 5292677 (1994-03-01), Dennison
patent: 5414655 (1995-05-01), Ozaki et al.
patent: 5448512 (1995-09-01), Hachisuka et al.
patent: 5597756 (1997-01-01), Fazan et al.
patent: 5604696 (1997-02-01), Takaishi
patent: 5650349 (1997-07-01), Prall et al.
patent: 5856220 (1999-01-01), Wang et al.
patent: 6023683 (2000-02-01), Johnson et al.
patent: 6074908 (2000-06-01), Huang
patent: 6077742 (2000-06-01), Chen et al.
patent: 6096595 (2000-08-01), Huang
patent: 6194758 (2001-02-01), Tanaka et al.
patent: 6309975 (2001-10-01), Wu et al.
patent: 6362666 (2002-03-01), Afghahi et al.
patent: 6369446 (2002-04-01), Tanaka
patent: 6713872 (2004-03-01), Tanaka
patent: 6940116 (2005-09-01), Tanaka et al.
patent: 7045420 (2006-05-01), Tanaka et al.
patent: 7368776 (2008-05-01), Tanaka et al.
patent: 7439132 (2008-10-01), Tanaka et al.
patent: 2001/0001211 (2001-05-01), Tanaka et al.
patent: 4307725 (1993-09-01), None
patent: 4323961 (1994-01-01), None
patent: 62-128168 (1987-10-01), None
patent: 1-257365 (1989-10-01), None
patent: 03-174767 (1991-07-01), None
patent: 04-061157 (1992-02-01), None
patent: 05-251658 (1993-09-01), None
patent: 5-335510 (1993-12-01), None
patent: 6-125051 (1994-05-01), None
patent: 6-196650 (1994-07-01), None
patent: 7-86434 (1995-03-01), None
patent: 7-142603 (1995-06-01), None
patent: 07-202019 (1995-08-01), None
patent: 7-249690 (1995-09-01), None
patent: 8-46152 (1996-02-01), None
patent: 8-125141 (1996-05-01), None
patent: 08-139293 (1996-05-01), None
patent: 8-306881 (1996-11-01), None
patent: 8-330533 (1996-12-01), None
patent: 9-64303 (1997-03-01), None
patent: 09-107082 (1997-04-01), None
patent: 9-116114 (1997-05-01), None
patent: WO 97/19468 (1997-05-01), None
Japanese Notice of Grounds of Rejection, w/ English translation thereof, issued in Japanese Patent Application No. JP 09-367189 dated Jun. 2, 2009.
Japanese Office Action, with English Translation, issued in Japanese Patent Application No. 09-367189, dated on Jan. 8, 2008.
Japanese Final Decision for Rejection, with English Translation, issued in Japanese Patent Application No. 2009-367189, mailed Mar. 30, 2010.
United States Office Action issued in U.S. Appl. No. 12/368,627, mailed Jan. 13, 2010.
Arima Hideaki
Shimizu Masahiro
Tanaka Yoshinori
McDermott Will & Emery LLP
Nhu David
Renesas Technology Corp.
LandOfFree
Semiconductor device comprising capacitor and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device comprising capacitor and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device comprising capacitor and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4170797